{"id":15799,"date":"2016-01-18T23:06:49","date_gmt":"2016-01-18T22:06:49","guid":{"rendered":"http:\/\/www.patentattorneys.ch\/?page_id=15799"},"modified":"2024-05-15T15:55:52","modified_gmt":"2024-05-15T14:55:52","slug":"protection_semi-conducteurs","status":"publish","type":"page","link":"https:\/\/www.patentattorneys.ch\/en\/our-services\/protection-of-semiconductor-topographies\/","title":{"rendered":"Protection of semiconductor topographies"},"content":{"rendered":"<div class=\"wpb-content-wrapper\"><p>[vc_row type=&#8221;full_width_section&#8221;][vc_column width=&#8221;1\/1&#8243;]<div class=\"imagebox wpb_content_element style-1\"><div class=\"imagebox-img\"><img decoding=\"async\" src=\"https:\/\/www.patentattorneys.ch\/wp-content\/uploads\/2019\/10\/banner_micro2_wide.jpg\" alt=\"Protection of semiconductor topographies - Protection des topographies de semi-conducteurs - Schutz der Topographien von Halbleitern\" \/><\/div><\/div>[\/vc_column][\/vc_row][vc_row][vc_column width=&#8221;1\/1&#8243;]<style>#breadcrumb-6a092023c12c9 li::after { content: \"\u00bb\" }<\/style><div class=\"\"><ol class=\"wwp-vc-breadcrumbs \" id=\"breadcrumb-6a092023c12c9\"><li class=\"visited\"><a href=\"\/\">Home<\/a><\/li><li class=\"visited\"><a href=\"https:\/\/www.patentattorneys.ch\/en\/our-services\/\">{:fr}Services{:}{:de}Dienstleitungen{:}{:en}Our services{:}<\/a><\/li><li class=\"current\"><span>Protection of semiconductor topographies<\/span><\/li><\/ol><\/div>[\/vc_column][\/vc_row][vc_row bg_image=&#8221;15893&#8243;][vc_column animation=&#8221;fade-in-from-left&#8221; width=&#8221;2\/3&#8243;]<div class=\"spacer\" style=\"height: 40px;\"><\/div>[vc_column_text]<\/p>\n<h1>Protection of semiconductor topographies<\/h1>\n<p>[\/vc_column_text][vc_tabs][vc_tab title=&#8221;Patents for semiconductors&#8221; tab_id=&#8221;c9c08126-3851-8&#8243;][vc_column_text]<b>Semi-conductor products<\/b>\u00a0(chips) can be protected by means of patents and are subjected in this respect to the same conditions as inventions in other fields.<\/p>\n<h6>Many countries, including Switzerland, have judged it useful to provide a title of protection specially adapted to semi-conductor products. This new form of protection makes it possible to protect at a reasonable cost the layout of a circuit, independently from its achieved function.<\/h6>\n<p>[\/vc_column_text][\/vc_tab][vc_tab title=&#8221;Semiconductor topographies&#8221; tab_id=&#8221;1453669696668-1-8&#8243;][vc_column_text]<b>The filing of semi-conductor topographies<\/b>\u00a0is cost-effective and makes it possible to protect oneself efficiently against slavish infringement and reverse-engineering. The register of topographies is public, so that the characteristics of the filed circuits cannot subsequently be patented. The topographies thus allow a protection with minimal formalities against the risk of infringement of patents filed subsequently by third parties.<\/p>\n<h6>Although the number of topographies filed remains modest to date, an increase is to be expected when the manufacturers and their counsels become better acquainted with this new title of protection. We have accumulated an experience unique in Switzerland in this field and continue to monitor closely all further developments.<\/h6>\n<p>Further information regarding the protection of semi-conductor topographies can be downloaded here.[\/vc_column_text][\/vc_tab][\/vc_tabs][\/vc_column][vc_column animation=&#8221;fade-in-from-bottom&#8221; width=&#8221;1\/3&#8243;]<div class=\"spacer\" style=\"height: 40px;\"><\/div>[vc_column_text]<\/p>\n<h3>CONTACT<\/h3>\n<p>[\/vc_column_text]<div class=\"member wpb_content_element test\"><div class=\"member-img\"><a href='https:\/\/www.patentattorneys.ch\/en\/our-team\/employees\/giovanni-gervasio\/'><img decoding=\"async\" src=\"https:\/\/www.patentattorneys.ch\/wp-content\/uploads\/2020\/10\/schreyer_2003381-1.jpg\" alt=\"Giovanni Gervasio\" \/><\/a><\/div><h4><a href='https:\/\/www.patentattorneys.ch\/en\/our-team\/employees\/giovanni-gervasio\/'>Giovanni Gervasio<\/a><\/h4><div class=\"member-role\">Technical Director<\/div><div class=\"member-content\"><p><\/p><\/div><\/div><div class=\"newdivider align-center\" style=\"border-bottom-style: solid; border-color: #b7b7b7; border-bottom-width: 1px; margin-top: 0; margin-bottom: 20px; width: 100%; \"><\/div><div class=\"clear\"><\/div>[\/vc_column][\/vc_row]<\/p>\n<\/div>","protected":false},"excerpt":{"rendered":"<p>[vc_row type=&#8221;full_width_section&#8221;][vc_column width=&#8221;1\/1&#8243;][\/vc_column][\/vc_row][vc_row][vc_column width=&#8221;1\/1&#8243;][\/vc_column][\/vc_row][vc_row bg_image=&#8221;15893&#8243;][vc_column animation=&#8221;fade-in-from-left&#8221; width=&#8221;2\/3&#8243;][vc_column_text] Protection of semiconductor topographies [\/vc_column_text][vc_tabs][vc_tab title=&#8221;Patents for semiconductors&#8221; tab_id=&#8221;c9c08126-3851-8&#8243;][vc_column_text]Semi-conductor products\u00a0(chips) can be protected by means of patents and are subjected in this respect to the same conditions as inventions in other fields. Many countries, including Switzerland, have judged it useful to provide a title of protection specially adapted to semi-conductor products. This new form of protection makes it possible to protect at a reasonable cost the layout of a circuit, independently from its achieved function. [\/vc_column_text][\/vc_tab][vc_tab title=&#8221;Semiconductor topographies&#8221; tab_id=&#8221;1453669696668-1-8&#8243;][vc_column_text]The filing of semi-conductor topographies\u00a0is cost-effective and makes it possible to protect oneself efficiently against slavish infringement and reverse-engineering. The register of topographies is public, so that the characteristics of the filed circuits cannot subsequently be patented. The topographies thus allow a protection with minimal formalities against the risk of infringement of patents filed subsequently by third parties. Although the number of topographies filed remains modest to date, an increase is to be expected when the manufacturers and their counsels become better acquainted with this new title of protection. We have accumulated an experience unique in Switzerland in this field and continue to monitor closely all further developments. Further information regarding the protection of semi-conductor [&hellip;]<\/p>\n","protected":false},"author":4,"featured_media":0,"parent":15428,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"translation":{"provider":"WPGlobus","version":"3.0.2","language":"en","enabled_languages":["fr","de","en","it"],"languages":{"fr":{"title":true,"content":true,"excerpt":false},"de":{"title":true,"content":true,"excerpt":false},"en":{"title":true,"content":true,"excerpt":false},"it":{"title":false,"content":false,"excerpt":false}}},"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v24.4 - https:\/\/yoast.com\/wordpress\/plugins\/seo\/ -->\n<title>Protection of semiconductor topographies - P&amp;TS Ltd<\/title>\n<meta name=\"description\" content=\"The protection of semiconductor topographies is covered by a patent under the same conditions as inventions in other fields.\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.patentattorneys.ch\/nos-services\/protection_semi-conducteurs\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Protection of semiconductor topographies - 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